ASIC NC

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CURRENT PRODUCT USING INTEL ULTRA PATH 2.0 (UPI) TECHNOLOGY

Node Controller: NumaChip-5 High Level Specifications

Overview:

    • Innovative Shared memory, Scalable and Cache Coherent System Interconnect Architecture

    • Supports high-performance 4th and 5th  Generation Intel® Xeon® Scalable Processors (Eagle Stream and Birch Stream Platform) processor nodes

    • Supports Intel Ultra Path Interconnect 2.0 (UPI 2.0) technology

    • ASIC implementation capable of supporting (8S, 16S, 32S) system configurations

Scalability:

    • Supports upto 24 GT/s full-width data-rate per UPI port (rate limited by CPU generation)

    • Performance improvement through on-chip partial-directory snoop filter architecture

    • Implements 8-UPI ports capable of connecting 8 components with UPI interface

    • Supports up to 4 switches connected for 32S system configurations

Security:

    • Superior RAS capabilities for the highest level of service

    • ECC protection on all important data structures (payload buffers, snoop filter, snoop filter cache, microcode instruction storage)

    • Support for viral and poison state mechanisms for handling error propagation and graceful shutdown

NumascaleNodeControllerChip

Node Controller: NumaChip-3 High Level Specifications

Overview:

    • Innovative Shared memory, Scalable and Cache Coherent System Interconnect Architecture

    • Supports high-performance 2nd Generation Intel® Xeon® Scalable Processors (Purley and Whitley Platforms) processor nodes

    • Supports Intel Ultra Path Interconnect 1.0 (UPI 1.0) technology

    • ASIC implementation capable of supporting (2S, 4S, 8S, 16S, 32S) system configurations

Scalability:

    • Supports upto 11.2 GT/s full-width data-rate per UPI port

    • Performance improvement through full-directory snoop filter architecture

    • Implements 2-UPI ports capable of connecting 2 components with UPI interface

    • Supports 16 connected UNC chips capable of handling 32 Home Agent NIDs

    • Supports two parallel data-planes by doubling the number of UNCs per system

Security:

    • Superior RAS capabilities for the highest level of service

    • ECC protection on all important data structures (payload buffers, snoop filter, snoop filter cache, microcode instruction storage)

    • Support for viral and poison state mechanisms for handling error propagation and graceful shutdown

NumascaleNodeControllerChip

PAST PRODUCTS USING AMD HYPERTRANSPORT (HT) TECHNOLOGY

NumaChip

The Numascale technology includes a modular chip microarchitecture that allows system vendors to choose the right configuration to support their performance requirements. The microarchitecture incudes several parallel micro-coded memory transaction engines with a large number of outstanding memory transactions, memory controller for the cache and memory tags, a cross-bar switch for the interconnect fabric and a number of interconnect fabric link controllers. This means that there is no need for any external interconnect fabric switch, all switching is performed on-chip and the interconnect fabric is implemented with wiring through a PCB backplane or cables. The entire design for NumaConnect™ is implemented in a single FPGA or ASIC called NumaChip™ depending on the system vendor’s requirements.

Numachip
FPGACHIP